Course contents

This is a companion lab to Computer Architecture course. A typical offering will either require students to implement/extend microarchitectural features in a cycle accurate simulator, or implement a simple processor from scratch using a HDL. The assignments may include design of micro-architecture blocks (2 weeks), experiments on instruction set architecture and its data-path (3 weeks), exploration of data hazards in pipelining (2 weeks) and memory hierarchy (3 weeks).

Learning Outcomes

Students are able to appreciate the concepts learnt in the theory course and the challenges in applying them in practice.