Code: CS3160 | Category: PMC | Credits: 0-0-3-2
Course contents
This is a companion lab to Computer Architecture course. A typical offering will either require students to implement/extend microarchitectural features in a cycle accurate simulator, or implement a simple processor from scratch using a HDL. The assignments may include design of micro-architecture blocks (2 weeks), experiments on instruction set architecture and its data-path (3 weeks), exploration of data hazards in pipelining (2 weeks) and memory hierarchy (3 weeks).
Learning Outcomes
Students are able to appreciate the concepts learnt in the theory course and the challenges in applying them in practice.
Past Offerings
(Note: Past offerings could be under a different course number.)- Offered in Jan-May, 2024 by Sandeep Chandran
- Offered in Jan-May, 2024 by Sandeep Chandran
- Offered in Jan-May, 2023 by Vivek Chaturvedi
- Offered in Jan-May, 2022 by Sandeep Chandran
- Offered in Jan-May, 2021 by Vivek, Sandeep
- Offered in Jan-May, 2020 by Vivek
- Offered in Jan-May, 2019 by Vivek, Sandeep
Course Metadata
| Item | Details |
|---|---|
| Course Title | Computer Architecture Lab |
| Course Code | CS3160 |
| Course Credits | 0-0-3-2 |
| Course Category | PMC |
| Proposing Faculty | Vivek Chaturvedi |
| Approved on | Senate 20 of IIT Palakkad |
| Course prerequisites | Computer Architecture (Prerequisite & Corequisite) |
| Course status | NEW |
| Course revision information | Minor revision of CS2160 Computer Organization Lab |
| Course pre-revision code | CS2160 |